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 LTC6406 3GHz, Low Noise, Rail-to-Rail Input Differential Amplifier/Driver FEATURES
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DESCRIPTION
The LTC(R)6406 is a very low noise, low distortion, fully differential input/output amplifier optimized for 3V, single supply operation. The LTC6406 input common mode range is rail-to-rail, while the output common mode voltage is independently adjustable by applying a voltage on the VOCM pin. This makes the LTC6406 ideal for level-shifting signals with a wide common mode range for driving 12-bit to 16-bit single supply, differential input ADCs. A 3GHz gain-bandwidth product results in 70dB linearity for 50MHz input signals. The LTC6406 is unity-gain stable and the closed-loop bandwidth extends from DC to 800MHz. The output voltage swing extends from near ground to 2V, to be compatible with a wide range of ADC converter input requirements. The LTC6406 draws only 18mA, and has a hardware shutdown feature which reduces current consumption to 300A. The LTC6406 is available in a compact 3mm x 3mm 16-pin leadless QFN package as well as an 8-lead MSOP package, and operates over a -40C to 85C temperature range.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
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Low Noise: 1.6nV/Hz RTI Low Power: 18mA at 3V Low Distortion (HD2/HD3): -80dBc/-69dBc at 50MHz, 2VP-P -104dBc/-90dBc at 20MHz, 2VP-P Rail-to-Rail Differential Input 2.7V to 3.5V Supply Voltage Range Fully Differential Input and Output Adjustable Output Common Mode Voltage 800MHz -3dB Bandwidth with AV = 1 Gain-Bandwidth Product: 3GHz Low Power Shutdown Available in 8-Lead MSOP and Tiny 16-Lead 3mm x 3mm x 0.75mm QFN Packages
APPLICATIONS
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Differential Input ADC Driver Single-Ended to Differential Conversion Level-Shifting Ground-Referenced Signals Level-Shifting VCC-Referenced Signals High Linearity Direct Conversion Receivers
TYPICAL APPLICATION
ADC Driver: Single-Ended Input to Differential Output with Common Mode Level Shifting
1.8pF VIN
Harmonic Distortion vs Frequency
-30 VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 800 = 2VP-P V -50 OUTDIFF DIFFERENTIAL INPUTS -60 -70 -80 -90 -100 2ND, RI = RF = 150 2ND, RI = RF = 500 3RD, RI = RF = 150 3RD, RI = RF = 500
150
150 3V DISTORTION (dBc) 3V VDD
-+
VOCM 1.25V LTC6406
+INA
LTC22xx ADC -INA GND
+-
150
150
6406 TA01
-110 1 10 FREQUENCY (MHz) 100
6406 TA01b
1.8pF
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LTC6406 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V-) ................................3.5V Input Current +IN, -IN, VOCM, SHDN, VTIP (Note 2) ...............10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4) ............................................... -40C to 85C
Specified Temperature Range (Note 5) LTC6406C ................................................ 0C to 70C LTC6406I.............................................. -40C to 85C Junction Temperature ........................................... 150C Storage Temperature Range................... -65C to 150C
PIN CONFIGURATION
TOP VIEW -OUTF -OUT +IN NC
16 15 14 13 SHDN V+ V- VOCM 1 2 3 4 5 VTIP 6 -IN 7 +OUT 8 +OUTF 17 12 V- 11 V+ 10 V+ 9 V- -IN 1 VOCM 2 V+ 3 +OUT 4
TOP VIEW 9 8 7 6 5 +IN SHDN V- -OUT
MS8E PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150C, JA = 40C/W, JC = 10C/W EXPOSED PAD (PIN 9) IS V-, MUST BE SOLDERED TO PCB
UD PACKAGE 16-LEAD (3mm x 3mm) PLASTIC QFN TJMAX = 150C, JA = 68C/W, JC = 4.2C/W EXPOSED PAD (PIN 17) IS V-, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH LTC6406CUD#PBF LTC6406IUD#PBF LTC6406CMS8E#PBF LTC6406IMS8E#PBF TAPE AND REEL LTC6406CUD#TRPBF LTC6406IUD#TRPBF LTC6406CMS8E#TRPBF LTC6406IMS8E#TRPBF PART MARKING* LCTC LCTC LTCTB LTCTB PACKAGE DESCRIPTION 16-Lead (3mm x 3mm) Plastic QFN 16-Lead (3mm x 3mm) Plastic QFN 8-Lead Plastic MSOP 8-Lead Plastic MSOP SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC6406 DC ELECTRICAL CHARACTERISTICS
SYMBOL VOSDIFF VOSDIFF/T PARAMETER Differential Offset Voltage (Input Referred)
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 3V, V- = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open, RBAL = 100k, RI = 150, RF = 150 (0.1% Resistors), CF = 1.8pF (See Figure 1) unless otherwise noted. VS is defined as (V+ - V-). VOUTCM is defined as (V+OUT + V-OUT)/2. VICM is defined as (V+IN + V-IN)/2. VOUTDIFF is defined as (V+OUT - V-OUT).
CONDITIONS VICM = 3V (Note 12) VICM = 1.25V VICM = 0V (Note 12) VICM = 3V (Note 12) VICM = 1.25V VICM = 0V (Note 12) VICM = 3V VICM = 1.25V VICM = 0V VICM = 3V VICM = 1.25V VICM = 0V Common Mode Differential Mode Differential
l l l l l l l
MIN
TYP 1 0.25 1 12 1 7 6 -9 -17 1 1 1 130 3 1 1.6 2.5 9
MAX 5 3.5 5
UNITS mV mV mV V/C V/C V/C A A A A A A k k pF nV/Hz pA/Hz nV/Hz
Differential Offset Voltage Drift (Input Referred)
IB
Input Bias Current (Note 6)
-24
-1
IOS
Input Offset Current (Note 6)
l
3
RIN CIN en in enVOCM VICMR (Note 7) CMRRI (Note 8) CMRRIO (Note 8) PSRR (Note 9) PSRRCM (Note 9) GCM GCM BAL
Input Resistance Input Capacitance Differential Input Referred Noise Voltage Density
f = 1MHz, Not Including RI/RF Noise Input Noise Current Density f = 1MHz, Not Including RI/RF Noise Input Referred Common Mode Output Noise Voltage Density f = 1MHz Input Signal Common Mode Range Input Common Mode Rejection Ratio (Input Referred) VICM/VOSDIFF Output Common Mode Rejection Ratio (Input Referred) VOCM/VOSDIFF Differential Power Supply Rejection (VS/VOSDIFF) Output Common Mode Power Supply Rejection (VS/VOSCM) Common Mode Gain (VOUTCM/VOCM) Common Mode Gain Error 100 * (GCM - 1) Output Balance (VOUTCM/VOUTDIFF) Op-Amp Inputs VICM from 0V to 3V VOCM from 0.5V to 2V VS = 2.7V to 3.5V VS = 2.7V to 3.5V VOCM from 0.5V to 2V VOCM from 0.5V to 2V VOUTDIFF = 2V Single-Ended Input Differential Input
l l l l l l l l l l l l l
V- 50 50 55 55 65 70 75 65 1 0.4 -57 -65 6 15 0.5 12 1.15 2.2 2 2 1.95 1.7 18 1.25 2.35 2.15 2.05 2 1.85 0.23 0.34 0.75
V+
V dB dB dB dB V/V
0.8 -45 -45 15 2 24 1.35
% dB dB mV V/C V k V V V V V V V V V
6406fb
VOSCM VOSCM/T VOUTCMR (Note 7) RINVOCM VOCM VOUT
Common Mode Offset Voltage (VOUTCM - VOCM) Common Mode Offset Voltage Drift Output Signal Common Mode Range (Voltage Range for the VOCM Pin) Input Resistance, VOCM Pin Self-Biased Voltage at the VOCM Pin Output Voltage, High, +OUT/-OUT Pins VOCM = Open VS = 3.3V, IL = 0 VS = 3.3V, IL = -20mA VS = 3V, IL = 0 VS = 3V, IL = -5mA VS = 3V, IL = -20mA VS = 3V, IL = 0 VS = 3V, IL = 5mA VS = 3V, IL = 20mA
l l l l l l l l l
Output Voltage, Low, +OUT/-OUT Pins
0.33 0.4 0.85
3
LTC6406 DC ELECTRICAL CHARACTERISTICS
SYMBOL ISC AVOL VS IS ISHDN RSHDN VIL VIH tON tOFF PARAMETER Output Short-Circuit Current, +OUT/-OUT Pins (Note 10) Large-Signal Open Loop Voltage Gain Supply Voltage Range Supply Current Supply Current in Shutdown SHDN Pull-Up Resistor SHDN Input Logic Low SHDN Input Logic High Turn-On Time Turn-Off Time VSHDN = 0V VSHDN = 0V to 0.5V
l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 3V, V- = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open, RBAL = 100k, RI = 150, RF = 150 (0.1% Resistors), CF = 1.8pF (See Figure 1) unless otherwise noted. VS is defined as (V+ - V-). VOUTCM is defined as (V+OUT + V-OUT)/2. VICM is defined as (V+IN + V-IN)/2. VOUTDIFF is defined as (V+OUT - V-OUT).
CONDITIONS
l
MIN 35 2.7
TYP 55 90
MAX
UNITS mA dB
3.5 18 300 22 500 140 2.55
V mA A k V V ns ns
60 0.4
100 0.7 2.25 200 50
AC ELECTRICAL CHARACTERISTICS
SYMBOL SR GBW f-3dB PARAMETER Slew Rate Gain-Bandwidth Product -3dB Frequency (See Figure 2) 50MHz Distortion Differential Input, VOUTDIFF = 2VP-P (Note 13)
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 3V, V- = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open, RI = 150, RF = 150 (0.1% Resistors), CF = 1.8pF RLOAD = 400 (See Figure 2) unless otherwise noted. VS is defined as (V+ - V-). , VICM is defined as (V+IN + V-IN)/2. VOUTDIFF is defined as (V+OUT - V-OUT).
CONDITIONS Differential Output fTEST = 30MHz
l
MIN
TYP 630 3
MAX
UNITS V/S GHz MHz dBc dBc dBc dBc
500
800 -77 -65 -85 -72
VOCM = 1.25V, VS = 3V 2nd Harmonic 3rd Harmonic VOCM = 1.25V, VS = 3V, RLOAD = 800 2nd Harmonic 3rd Harmonic VOCM = 1.25V, VS = 3V, RLOAD = 800, RI = RF = 500 2nd Harmonic 3rd Harmonic
l
-55
-80 -69
dBc dBc
50MHz Distortion Single-Ended Input, VOUTDIFF = 2VP-P (Note 13) 3rd-Order IMD at 49.5MHz, 50.5MHz OIP3 at 50MHz (Note 11) tS Settling Time
VOCM = 1.25V, VS = 3V, RLOAD = 800, RI = RF = 500 2nd Harmonic 3rd Harmonic VOUTDIFF = 2VP-P Envelope, RLOAD = 800 RLOAD = 800 VOUTDIFF = 2V Step 1% Settling 0.1% Settling Shunt-Terminated to 50, RS = 50 ZIN = 200 (RI = 100, RF = 300)
-69 -73 -65 36.5 7 11 14.1 7.5
dBc dBc dBc dBm ns ns dB dB
NF
Noise Figure at 50MHz
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LTC6406 ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Input pins (+IN, -IN, VOCM, SHDN and VTIP) are protected by steering diodes to either supply. If the inputs should exceed either supply voltage, the input current should be limited to less than 10mA. In addition, the inputs +IN, -IN are protected by a pair of back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the Absolute Maximum Rating when the output is shorted indefinitely. Long-term application of output currents in excess of the absolute maximum ratings may impair the life of the device. Note 4: The LTC6406C/LTC6406I are guaranteed functional over the operating temperature range -40C to 85C. Note 5: The LTC6406C is guaranteed to meet specified performance from 0C to 70C. The LTC6406C is designed, characterized, and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. The LTC6406I is guaranteed to meet specified performance from -40C to 85C. Note 6: Input bias current is defined as the average of the input currents flowing into the inputs (-IN, and +IN). Input offset current is defined as the difference between the input currents (IOS = IB+ - IB-). Note 7: Input common mode range is tested using the test circuit of Figure 1 by taking three measurements of differential gain with a 1V DC differential output with VICM = 0V; VICM = 1.25V; VICM = 3V, verifying that the differential gain has not deviated from the VICM = 1.25V case by more than 0.5%, and that the common mode offset (VOSCM) has not deviated from the common mode offset at VICM = 1.25V by more than 20mV. The voltage range for the output common mode range is tested using the test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at both VOCM = 1.25V and at the Electrical Characteristics table limits to verify that the common mode offset (VOSCM) has not deviated by more than 10mV from the VOCM = 1.25V case. Note 8: Input CMRR is defined as the ratio of the change in the input common mode voltage at the pins +IN or -IN to the change in differential input referred voltage offset. Output CMRR is defined as the ratio of the change in the voltage at the VOCM pin to the change in differential input referred voltage offset. This specification is strongly dependent on feedback ratio matching between the two outputs and their respective inputs, and it is difficult to measure actual amplifier performance (see the "Effects of Resistor Pair Mismatch" in the Applications Information section of this data sheet). For a better indicator of actual amplifier performance independent of feedback component matching, refer to the PSRR specification. Note 9: Differential power supply rejection (PSRR) is defined as the ratio of the change in supply voltage to the change in differential input referred voltage offset. Common mode power supply rejection (PSRRCM) is defined as the ratio of the change in supply voltage to the change in the common mode offset, VOUTCM - VOCM. Note 10: Extended operation with the output shorted may cause the junction temperature to exceed the 150C limit. Note 11: Because the LTC6406 is a feedback amplifier with low output impedance, a resistive load is not required when driving an ADC. Therefore, typical output power can be very small in many applications. In order to compare the LTC6406 with "RF style" amplifiers that require 50 load, the output voltage swing is converted to dBm as if the outputs were driving a 50 load. For example, 2VP-P output swing is equal to 10dBm using this convention. Note 12: Includes offset/drift induced by feedback resistors mismatch. See the Applications Information section for more details. Note 13: QFN package only. Refer to data sheet curves for MSOP package numbers.
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Input Referred Offset Voltage vs Temperature
1.2 1.0 DIFFERENTIAL VOS (mV) 0.8 0.6 0.4 0.2 0 -0.2 -50 DIFFERENTIAL VOS (mV) VS = 3V VOCM = 1.25V VICM = 1.25V RI = RF = 150 FIVE TYPICAL UNITS 2.0 1.5 1.0 0.5 0 -0.5 V = 3V -1.0 VS = 1.25V OCM RI = RF = 150 -1.5 0.1% FEEDBACK NETWORK RESISTORS TYPICAL UNIT -2.0 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V)
Differential Input Referred Offset Voltage vs Input Common Mode Voltage
COMMON MODE OFFSET VOLTAGE (mV) TA = -40C TA = 0C TA = 25C TA = 70C TA = 85C 7 6 5 4 3 2
Common Mode Offset Voltage vs Temperature
-25
0 25 50 TEMPERATURE (C)
75
100
6406 G01
3.0
VS = 3V 1 VOCM = 1.25V VICM = 1.25V FIVE TYPICAL UNITS 0 -50 -25 0 25 50 TEMPERATURE (C)
75
100
6406 G03
6406 G02
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LTC6406 TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
20 TOTAL SUPPLY CURRENT (mA) TA = -40C TA = 0C TA = 25C TA = 70C TA = 85C 20 TOTAL SUPPLY CURRENT (mA)
Supply Current vs SHDN Voltage
SHUTDOWN SUPPLY CURRENT (A) TA = -40C TA = 0C TA = 25C TA = 70C TA = 85C 500 450 400 350 300 250 200 150 100 50 0
Shutdown Supply Current vs Supply Voltage
TA = -40C TA = 0C TA = 25C TA = 70C TA = 85C
15
15
10
10
5
5
0 0 0.5
VSHDN = OPEN 1.0 1.5 2.0 2.5 SUPPLY VOLTAGE (V) 3.0 3.5
0 0 0.5 1.0 1.5 2.0 SHDN VOLTAGE (V)
VS = 3V 2.5 3.0
6406 G05
VSHDN = V- 0 0.5 1.0 1.5 2.0 2.5 SUPPLY VOLTAGE (V) 3.0 3.5
6406 G04
6406 G06
Input Noise Density vs Frequency
100 INPUT VOLTAGE NOISE DENSITY (nV/ Hz) INPUT VOLTAGE NOISE DENSITY (nV/Hz) VS = 3V VICM = 1.25V 100 INPUT CURRENT NOISE DENSITY (pA/ Hz) 4
Input Noise Density vs Input Common Mode Voltage
4 INPUT CURRENT NOISE DENSITY (pA/Hz) 650
Differential Slew Rate vs Temperature
VS = 3V
3 in 2 en 1 VS = 3V NOISE MEASURED AT f = 1MHz 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V)
3
630 SLEW RATE (V/s)
610
10
10
2
590
in en 1 100 1k 10k 100k FREQUENCY (Hz) 1M 1 10M
6406 G07
1
570
0
0 3.0
550 -50
-25
0 25 50 TEMPERATURE (C)
75
100
6406 G09
6406 G08
Differential Output Impedance vs Frequency
1000 VS = 3V RI = RF = 150 80 70 60 5O 40 30 0.1
CMRR vs Frequency
80 70 60 PSRR (dB) 5O 40 30 20 10
Differential PSRR vs Frequency
OUTPUT IMPEDANCE ()
100
10
1
CMRR (dB)
0.01 1 10 100 FREQUENCY (MHz) 1000 2000
6406 G10
VS = 3V 20 VOCM = 1.25V RI = RF = 150, CF = 1.8pF 0.1% FEEDBACK NETWORK RESISTORS 10 1 10 100 1000 2000 FREQUENCY (MHz)
6406 G11
VS = 3V 1 10 100 FREQUENCY (MHz) 1000 2000
6406 G12
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LTC6406 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Step Response
+OUT
(QFN Package)
Large-Signal Step Response
2.5 -OUT 2.0 VOLTAGE (V)
Output Overdrive Response
-OUT 1.5 1.0 0.5 +OUT 100ns/DIV VS = 3V VOCM = 1.25V RLOAD = 200 TO GROUND PER OUTPUT
6406 G15
20mV/DIV
0.2V/DIV
-OUT 10ns/DIV VS = 3V VOCM = VICM = 1.25V RLOAD = 400 RI = RF = 150, CF = 1.8pF CL = 0pF VIN = 200mVP-P, DIFFERENTIAL
6406 G13
+OUT 10ns/DIV VS = 3V RLOAD = 400 VIN = 2VP-P, DIFFERENTIAL
6406 G14
0
Frequency Response vs Closed-Loop Gain
50 40 30 20 GAIN (dB) GAIN (dB) 10 0 -10 -20 -30 AV = 1 AV = 2 AV = 5 AV = 10 AV = 20 AV = 100 1000 2000 CF (pF) 1.8 1.8 0.7 0.3 0.2 0
6406 G16
Frequency Response vs Load Capacitance
30 20 10 0 -10 -20 VS = 3V -30 VOCM = VICM = 1.25V RLOAD = 400 -40 RI = RF = 150, CF = 1.8pF CAPACITOR VALUES ARE FROM EACH -50 OUTPUT TO GROUND. NO SERIES RESISTORS ARE USED. -60 1 10 100 1000 2000 FREQUENCY (MHz)
6406 G17
Frequency Response vs Input Common Mode Voltage
10 5 0 -5 GAIN (dB) -10 -15 -20 -25 VS = 3V VOCM = 1.25V -30 RLOAD = 400 RI = RF = 150, CF = 1.8pF -35 1 10 100 FREQUENCY (MHz) VICM = 0V VICM = 0.5V VICM = 1.25V VICM = 2V VICM = 3V
CL = 0pF CL = 2pF CL = 3pF CL= 4.7pF CL = 10pF
VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 400 -50 1 10 100 FREQUENCY (MHz) AV (V/V) RI () 1 2 5 10 20 100 150 150 150 150 150 150 RF () 150 300 750 1.5k 3k 15k
1000 2000
6406 G18
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LTC6406 TYPICAL PERFORMANCE CHARACTERISTICS
Harmonic Distortion vs Frequency
-30 VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 800 = 2VP-P V -50 OUTDIFF DIFFERENTIAL INPUTS -60 -70 -80 -90 -100 -110 1 10 FREQUENCY (MHz) 100
6406 G19
(QFN Package) Harmonic Distortion vs Input Amplitude
-40 VS = 3V VOCM = VICM = 1.25V -50 fIN = 50MHz RLOAD = 800 RI = RF = 150 -60 DIFFERENTIAL INPUTS -70 3RD -80 -90 -100 -2 -4 (0.4VP-P)
Harmonic Distortion vs Input Common Mode Voltage
-40 -50 DISTORTION (dBc) -60 -70 -80 VS = 3V -90 VOCM = 1.25V VOUTDIFF = 2VP-P fIN = 50MHz RLOAD = 800 DIFFERENTIAL INPUTS -100 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V) 2ND, RI = RF = 150 2ND, RI = RF = 500 3RD, RI = RF = 150 3RD, RI = RF = 500 DISTORTION (dBc)
DISTORTION (dBc)
2ND, RI = RF = 150 2ND, RI = RF = 500 3RD, RI = RF = 150 3RD, RI = RF = 500
2ND
3.0
0 2 4 6 INPUT AMPLITUDE (dBm)
8
10 (2VP-P)
6406 G21
6406 G20
Harmonic Distortion vs Frequency
-30 VS = 3V VOUTDIFF = 2VP-P -40 VOCM = VICM = 1.25V SINGLE-ENDED INPUT RLOAD = 800 -50 DISTORTION (dBc) DISTORTION (dBc) -60 -70 -80 -90 -100 -110 1 10 FREQUENCY (MHz) 100
6406 G22
Harmonic Distortion vs Input Common Mode Voltage
-40 -50 -60 -70 VS = 3V 3RD -80 VOCM = 1.25V fIN = 50MHz RLOAD = 800 -90 RI = RF = 500 VOUTDIFF = 2VP-P SINGLE-ENDED INPUT -100 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V) 2ND DISTORTION (dBc) -40
Harmonic Distortion vs Input Amplitude
VS = 3V VOCM = VICM = 1.25V -50 fIN = 50MHz RLOAD = 800 RI = RF = 500 -60 SINGLE-ENDED INPUT -70 2ND -80 3RD -90 -100 -4 -2 (0.4VP-P)
2ND, RI = RF = 150 2ND, RI = RF = 500 3RD, RI = RF = 150 3RD, RI = RF = 500
3.0
0 2 4 6 INPUT AMPLITUDE (dBm)
8
10 (2VP-P)
6406 G24
6406 G23
Intermodulation Distortion vs Frequency
-30 VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 800 RI = RF = 150 -50 2 TONES, 1MHz TONE SPACING, 2VP-P COMPOSITE -60 DIFFERENTIAL INPUTS -70 -80 -90 -100 -110 1 10 FREQUENCY (MHz) 100
6406 G25
Intermodulation Distortion vs Input Common Mode Voltage
-40 -50 THIRD ORDER IMD (dBc) -60 -70 V = 3V S VOCM = 1.25V -80 fIN = 50MHz RLOAD = 800 RI = RF = 150 -90 2 TONES, 1MHz TONE SPACING, 2VP-P COMPOSITE DIFFERENTIAL INPUTS -100 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V) THIRD ORDER IMD (dBc) -40
Intermodulation Distortion vs Input Amplitude
VS = 3V VOCM = VICM = 1.25V -50 fIN = 50MHz RLOAD = 800 RI = RF = 150 -60 2 TONES, 1MHz TONE SPACING DIFFERENTIAL INPUTS -70 -80 -90 -100 -4 -2 (0.4VP-P)
THIRD ORDER IMD (dBc)
3.0
0 2 4 6 INPUT AMPLITUDE (dBm)
8
10 (2VP-P)
6406 G27
6406 G26
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LTC6406 TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Response vs Closed-Loop Gain
50 40 30 20 GAIN (dB) GAIN (dB) 10 0 -10 -20 -30 AV = 1 AV = 2 AV = 5 AV = 10 AV = 20 AV = 100 1000 2000 30 20 10 0 -10 -20 VS = 3V -30 VOCM = VICM = 1.25V RLOAD = 400 -40 RI = RF = 150, CF = 2.2pF CAPACITOR VALUES ARE FROM -50 EACH OUTPUT TO GROUND. NO SERIES RESISTORS ARE USED. -60 1 10 100 FREQUENCY (MHz)
(MSOP Package) Frequency Response vs Input Common Mode Voltage
10 5 0 -5 GAIN (dB) -10 -15 -20 -25 VS = 3V VOCM = 1.25V -30 RLOAD = 400 RI = RF = 150, CF = 2.2pF -35 1 10 100 FREQUENCY (MHz) VICM = 0V VICM = 0.5V VICM = 1.25V VICM = 2V VICM = 3V
Frequency Response vs Load Capacitance
CL = 0pF CL = 2pF CL = 3pF CL= 4.7pF CL = 10pF
VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 400 -50 1 10 100 FREQUENCY (MHz) AV (V/V) RI () 1 2 5 10 20 100 150 150 150 150 150 150 RF () 150 300 750 1.5k 3k 15k
1000 2000
6406 G29
1000 2000
6406 G30
CF (pF) 2.2 2.2 0.9 0.4 0.2 0
6406 G28
Harmonic Distortion vs Frequency
-30 VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 800 -50 VOUTDIFF = 2VP-P DIFFERENTIAL INPUTS -60 2ND, RI = RF = 150 2ND, RI = RF = 500 -70 3RD, RI = RF = 150 3RD, RI = RF = 500 -80 -90 -100 -110 10 10 FREQUENCY (MHz) 100
6406 G31
Harmonic Distortion vs Input Common Mode Voltage
-40 -50 DISTORTION (dBc) -60 -70 -80 -90 -100 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V) 3.0
6406 G32
Harmonic Distortion vs Input Amplitude
-40 VS = 3V VOCM = VICM = 1.25V fIN = 50MHz RLOAD = 800 RI = RF = 150 DIFFERENTIAL INPUTS
2ND, RI = RF = 150 2ND, RI = RF = 500 3RD, RI = RF = 150 3RD, RI = RF = 500 DISTORTION (dBc)
-50 -60 -70 -80 -90 -100
DISTORTION (dBc)
2ND 3RD
VS = 3V VOCM = 1.25V fIN = 50MHz RLOAD = 800 VOUTDIFF = 2VP-P DIFFERENTIAL INPUTS
-4 -2 (0.4VP-P)
0 2 4 6 INPUT AMPLITUDE (dBm)
8
10 (2VP-P)
6406 G33
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9
LTC6406 TYPICAL PERFORMANCE CHARACTERISTICS
Harmonic Distortion vs Frequency
-30 VS = 3V -40 VOCM = VICM = 1.25V RLOAD = 800 = 2VP-P V -50 OUTDIFF SINGLE-ENDED INPUT -60 -70 -80 -90 -100 -110 10 2ND, RI = RF = 150 2ND, RI = RF = 500 3RD, RI = RF = 150 3RD, RI = RF = 500 10 FREQUENCY (MHz) 100
6406 G34
(MSOP Package) Harmonic Distortion vs Input Amplitude
-40 VS = 3V VOCM = VICM =1.25V -50 fIN = 50MHz RLOAD = 800 RI = RF = 500 SINGLE-ENDED INPUT -60 -70 -80 -90 -100
Harmonic Distortion vs Input Common Mode Voltage
-40 -50 DISTORTION (dBc) -60 2ND -70 -80 -90 -100 0 0.5 1.0 1.5 2.0 2.5 INPUT COMMON MODE VOLTAGE (V) 3.0
6406 G35
DISTORTION (dBc)
2ND
DISTORTION (dBc)
VS = 3V VOCM = 1.25V fIN = 50MHz RLOAD = 800 RI = RF = 500 VOUTDIFF = 2VP-P SINGLE-ENDED INPUT
3RD
3RD
-4 -2 (0.4VP-P)
0 2 4 6 INPUT AMPLITUDE (dBm)
8
10 (2VP-P)
6406 G36
PIN FUNCTIONS
(QFN/MSOP)
SHDN (Pin 1/Pin 7): When SHDN is floating or directly tied to V+, the LTC6406 is in the normal (active) operating mode. When the SHDN pin is connected to V-, the LTC6406 enters into a low power shutdown state with Hi-Z outputs. V+, V- (Pins 2, 10, 11 and Pins 3, 9, 12/Pins 3, 6): Power Supply Pins. It is critical that close attention be paid to supply bypassing. For single supply applications it is recommended that a high quality 0.1F surface mount ceramic bypass capacitor be placed between V+ and V- with direct short connections. In addition, V- should be tied directly to a low impedance ground plane with minimal routing. For dual (split) power supplies, it is recommended that additional high quality, 0.1F ceramic capacitors are used to bypass V+ to ground and V- to ground, again with minimal routing. For driving large loads (<200), additional bypass capacitance may be needed for optimal performance. Keep in mind that small geometry (e.g. 0603 or smaller) surface mount ceramic capacitors have a much higher self resonant frequency than do leaded capacitors, and perform best in high speed applications. VOCM (Pin 4/Pin 2): Output Common Mode Reference Voltage. The voltage on VOCM sets the output common mode voltage level (which is defined as the average of the
voltages on the +OUT and -OUT pins). The VOCM voltage is internally set by a resistive divider between the supplies, developing a default voltage potential of 1.25V with a 3V supply. The VOCM pin can be overdriven by an external voltage capable of driving the 18k Thevenin equivalent impedance presented by the pin. The VOCM pin should be bypassed with a high quality ceramic bypass capacitor of at least 0.01F to minimize common mode noise from being , converted to differential noise by impedance mismatches both externally and internally to the IC. VTIP (Pin 5/NA): This pin can normally be left floating. It determines which pair of input transistors (NPN or PNP or both) is sensing the input signal. The VTIP pin is set by an internal resistive divider between the supplies, developing a default 1.55V voltage with a 3V supply. VTIP has a Thevenin equivalent resistance of approximately 15k and can be overdriven by an external voltage. The VTIP pin should be bypassed with a high quality ceramic bypass capacitor of at least 0.01F See the Applications . Information section for more details. +OUT, -OUT (Pins 7, 14/Pins 4, 5): Unfiltered Output Pins. Besides driving the feedback network, each pin can drive an additional 50 to ground with typical shortcircuit current limiting of 55mA. Each amplifier output
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10
LTC6406 PIN FUNCTIONS
(QFN/MSOP)
is designed to drive a load capacitance of 5pF Larger . capacitive loads should be decoupled with at least 15 resistors from each output. +OUTF -OUTF (Pins 8, 13/NA): Filtered Output Pins. These , pins have a series RC network (R = 50, C = 3.75pF) connected between the filtered and unfiltered outputs. See the Applications Information section for more details. +IN, -IN (Pins 15, 6/Pins 8, 1): Noninverting and Inverting Input Pins of the amplifier, respectively. For best perfor-
mance, it is highly recommended that stray capacitance be kept to an absolute minimum by keeping printed circuit connections as short as possible. NC (Pin 16/NA): No Connection. This pin is not connected internally. Exposed Pad (Pin 17/Pin 9): Tie the bottom pad to V-. If split supplies are used, DO NOT tie the pad to ground.
BLOCK DIAGRAMS
LTC6406 Block Diagram/Pinout in MSOP Package
8 +IN 7 SHDN 100k V+ 43k V+ V+ 6 V- V- 5 -OUT
+ -
V- V+ -IN 1 2 VOCM V+ 3 4 +OUT
6406 BD01
30k V-
LTC6406 Block Diagram/Pinout in QFN Package
16 SHDN 100k V+ 2 V- 3 V- 30k VOCM 4 32k V- 5 VTIP -IN 6 7 +OUT 8 +OUTF
6406 BD02
NC
15
+IN
14
-OUT
13
-OUTF V- 12 V- V+ 11 V+ 1.25pF V+ 10
1.25pF V+ V+ V+ 43k 50
1
V+ V+
+ -
V- 50
30k V-
V+
- 1.25pF V V-
9
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11
LTC6406 APPLICATIONS INFORMATION
Functional Description The LTC6406 is a small outline, wideband, low noise, and low distortion fully-differential amplifier with accurate output phase balancing. The LTC6406 is optimized to drive low voltage, single-supply, differential input analogto-digital converters (ADCs). The LTC6406 input common mode range is rail-to-rail, while the output common mode voltage is independently adjustable by applying a voltage on the VOCM pin. The output voltage swing extends from near ground to 2V, to be compatible with a wide range of ADC converter input requirements. This makes the LTC6406 ideal for level-shifting signals with a wide common mode range for driving 12-bit to 16-bit single supply, differential input ADCs. The differential output allows for twice the signal swing in low voltage systems when compared to
CF
single-ended output amplifiers. The balanced differential nature of the amplifier also provides even-order harmonic distortion cancellation, and less susceptibility to common mode noise (like power supply noise). The LTC6406 can be used as a single-ended input to differential output amplifier, or as a differential input to differential output amplifier. The LTC6406 output common mode voltage, defined as the average of the two output voltages, is independent of the input common mode voltage, and is adjusted by applying a voltage on the VOCM pin. If the pin is left open, there is an internal resistive voltage divider, which develops a potential of 1.25V (if the supply is 3V). It is recommended that a high quality ceramic capacitor is used to bypass the VOCM pin to a low impedance ground plane. The LTC6406's internal common mode feedback path forces accurate
RI
V+IN
RF V-OUT V-OUTF
+
VINP
-
16
NC
15
+IN
14
-OUT
13
-OUTF
LTC6406 V- 12 V- V+ 11 V- 0.1F V- 0.1F V+
SHDN SHDN VSHDN V+ 0.1F VCM V- 3 1 V+ 2 V- V- VOCM VVOCM 0.01F 5 4 VTIP 0.01F RI RF 6 -IN 7 +OUT 8 100k V+ 50
1.25pF
RBAL 100k
+
VOCM 1.25pF V + 50 1.25pF
VOUTCM
-
V+ 10 V- V- 9 V- V- 0.1F
6406 F01
0.1F
0.1F RBAL 100k
+OUTF
-
VINM
V+OUTF
+
V-IN
V+OUT
CF
Figure 1. DC Test Circuit
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12
LTC6406 APPLICATIONS INFORMATION
CF 0.1F 0.1F RI V+IN RF V-OUT 16 15 14 V-OUTF 13 100
RT NC +IN
-OUT
-OUTF
LTC6406 V- 12 V
-
SHDN 50 MINI-CIRCUITS TCM4-19 SHDN VSHDN V+ 0.1F V- 3 1 V+ 2 V- V- VOCM VVOCM RT CHOSEN SO THAT RT||RI = 100 0.01F 5 4 VTIP 0.01F RT 0.1F RI RF V+OUT 6 -IN 7 +OUT 8 100k V
+
1.25pF
V- 0.1F MINI-CIRCUITS TCM4-19
*
*
*
*
50
+
VIN
+
VOCM 1.25pF V+ 50 1.25pF
V+ 11 V+ 10
V- 0.1F V+ 50
-
-
V- V- 9
V-
-
0.1F V 0.1F
0.1F
+OUTF
6406 F02
V+OUTF 100 0.1F
V-IN
CF
Figure 2. AC Test Circuit (-3dB BW Testing)
output phase balancing to reduce even order harmonics, and centers each individual output about the potential set by the VOCM pin. VOUTCM = VOCM = V+OUT + V-OUT 2
The outputs (+OUT and -OUT) of the LTC6406 are capable of swinging from close to ground to typically 1V below V+. They can source or sink up to approximately 55mA of current. Each output is designed to directly drive up to 5pF to ground. Higher load capacitances should be decoupled with at least 15 of series resistance from each output. Input Pin Protection The LTC6406 input stage is protected against differential input voltages which exceed 1.4V by two pairs of series diodes connected back to back between +IN and -IN. In
addition, the input pins have clamping diodes to either power supply. If the input pins are over-driven, the current should be limited to under 10mA to prevent damage to the IC. The LTC6406 also has clamping diodes to either power supply on the VOCM, VTIP and SHDN pins and if driven to voltages which exceed either supply, they too, should be current limited to under 10mA. SHDN Pin The SHDN pin is a CMOS logic input with a 100k internal pull-up resistor. If the pin is driven low, the LTC6406 powers down with Hi-Z outputs. If the pin is left unconnected or driven high, the part is in normal active operation. Some care should be taken to control leakage currents at this pin to prevent inadvertently putting the LTC6406 into shutdown. The turn-on and turn-off time between the shutdown and active states are typically less than 1s.
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13
LTC6406 APPLICATIONS INFORMATION
General Amplifier Applications As levels of integration have increased and correspondingly, system supply voltages decreased, there has been a need for ADCs to process signals differentially in order to maintain good signal to noise ratios. These ADCs are typically supplied from a single supply voltage which can be as low as 3V, and will have an optimal common mode input range of 1.25V or 1.5V. The LTC6406 makes interfacing to these ADCs easy, by providing both single-ended to differential conversion as well as common mode level shifting. The front page of this data sheet shows a typical application. The gain to VOUTDIFF from VINM and VINP is: R VOUTDIFF = V+OUT - V-OUT F * ( VINP - VINM ) RI Note from the above equation, the differential output voltage (V+OUT - V-OUT) is completely independent of input and output common mode voltages, or the voltage at the common mode pin. This makes the LTC6406 ideally suited for preamplification, level shifting and conversion of single-ended signals to differential output signals in preparation for driving differential input ADCs. Effects of Resistor Pair Mismatch Figure 3 shows a circuit diagram which takes into consideration that real world resistors will not match perfectly. Assuming infinite open-loop gain, the differential output relationship is given by the equation: VOUTDIFF = V+OUT - V-OUT * VICM - *V AVG OCM AVG where: RF is the average of RF1, and RF2, and RI is the average of RI1, and RI2. AVG is defined as the average feedback factor from the outputs to their respective inputs: RI2 1 RI1 AVG = * + 2 RI1 + RF1 RI2 + RF2
6406fb
is defined as the difference in feedback factors: = RI2 RI1 - RI2 + RF2 RI1 + RF1
VICM is defined as the average of the two input voltages VINP, and VINM (also called the input common mode voltage): 1 VICM = * ( VINP + VINM ) 2 and VINDIFF is defined as the difference of the input voltages: VINDIFF = VINP - VINM VOCM is defined as the average of the two output voltages V+OUT and V-OUT: VOCM = V+OUT + V-OUT 2
When the feedback ratios mismatch (), common mode to differential conversion occurs. Setting the differential input to zero (VINDIFF = 0), the degree of common mode to differential conversion is given by the equation: VOUTDIFF = V+OUT - V-OUT ( VICM - VOCM ) *
RI2 V+IN RF2 V-OUT
AVG
RF *V + RI INDIFF
+
VINP
- +
VVOCM VOCM
- -
VINM
+
RI1
V-IN
RF1
6406 F03
V+OUT
Figure 3. Real-World Application with Feedback Resistor Pair Mismatch
14
LTC6406 APPLICATIONS INFORMATION
In general, the degree of feedback pair mismatch is a source of common mode to differential conversion of both signals and noise. Using 1% resistors or better will mitigate most problems, and will provide about 34dB worst case of common mode rejection. Using 0.1% resistors will provide about 54dB of common mode rejection. A low impedance ground plane should be used as a reference for both the input signal source and the VOCM pin. Bypassing the VOCM with a high quality 0.1F ceramic capacitor to this ground plane will further help prevent common mode signals from being converted to differential signals. There may be concern on how feedback factor mismatch affects distortion. Feedback factor mismatch from using 1% resistors or better, has a negligible effect on distortion. However, in single supply level-shifting applications where there is a voltage difference between the input common mode voltage and the output common mode voltage, resistor mismatch can make the apparent voltage offset of the amplifier appear worse than specified. The apparent input referred offset induced by feedback factor mismatch is derived from the above equation: VOSDIFF(APPARENT) (VICM - VOCM) * Using the LTC6406 in a single supply application on a single 3V supply with 1% resistors, and the input common mode grounded, with the VOCM pin biased at 1.25V, the worst case DC offset can induce 12.5mV of apparent offset voltage. With 0.1% resistors, the worst-case apparent offset reduces to 1.25mV. Input Impedance and Loading Effects The input impedance looking into the VINP or VINM input of Figure 1 depends on whether or not the sources VINP and VINM are fully differential or not. For balanced input sources (VINP = -VINM), the input impedance seen at either input is simply: RINP = RINM = RI For single-ended inputs, because of the signal imbalance at the input, the input impedance actually increases over R2 =
R1 CHOSEN SO THAT R1||RINM = RS R2 CHOSEN TO BALANCE R1||RS RI R2 RS||R1
the balanced differential case. The input impedance looking into either input is: RINP = RINM = RI 1 RF 1- 2 * R + R I F
Input signal sources with non-zero output impedances can also cause feedback imbalance between the pair of feedback networks. For the best performance, it is recommended that the input source output impedance be compensated for. If input impedance matching is required by the source, a termination resistor R1 should be chosen (see Figure 4): R1= RINM * RS RINM - RS
RINM RS VS R1 RI RF
- +
RF
+ -
6406 F04
Figure 4. Optimal Compensation for Signal Source Impedance
According to Figure 4, the input impedance looking into the differential amp (RINM) reflects the single-ended source case, thus: RINM = RI 1 RF 1- 2 * R + R I F
R2 is chosen to equal R1||RS: R1* RS R1+ RS
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15
LTC6406 APPLICATIONS INFORMATION
Input Common Mode Voltage Range The LTC6406's input common mode voltage (VICM) is defined as the average of the two input voltages, V+IN, and V-IN. At the inputs to the actual op amp, the range extends from V- to V+. This makes it easy to interface to a wide range of common mode signals, from ground referenced to VCC referenced signals. Moreover, due to external resistive divider action of the gain and feedback resistors, the effective range of signals that can be processed is even wider. The input common mode range at the op amp inputs depends on the circuit configuration (gain), VOCM and VCM (refer to Figure 5). For fully differential input applications, where VINP = -VINM, the common mode input is approximately: VICM = RI V+IN + V-IN + VOCM * 2 RI + RF Manipulating the Rail-to-Rail Input Stage with VTIP To achieve rail-to-rail input operation, the LTC6406 features an NPN input stage in parallel with a PNP input stage. When the input common mode voltage is near V+, the NPNs are active while the PNPs are off. When the input common mode is near V-, the PNPs are active while the NPNs are off. At some range in the middle, both input stages are active. This `hand-off' operation happens automatically. In the QFN package, a special pin, VTIP, is made available that can be used to manipulate the `hand-off' operation between the NPN and PNP input stages. By default, the VTIP pin is internally biased by an internal resistive divider between the supplies, developing a default 1.55V voltage with a 3V supply. If desired, VTIP can be overdriven by an external voltage (the Thevenin equivalent resistance is approximately 15k). If VTIP is pulled closer to V-, the range over which the NPN input pair remains active is increased, while the range over which the PNP input pair is active is reduced. In applications where the input common mode does not come close to V- , this mode can be used to further improve linearity beyond the specified performance. If VTIP is pulled closer to V+, the range over which the PNP input pair remains active is increased, while the range over which the NPN input pair is active is reduced. In applications where the input common mode does not come close to V+, this mode can be used to further improve linearity beyond the specified performance.
RF VCM * RF + RI With single-ended inputs, there is an input signal component to the input common mode voltage. Applying only VINP (setting VINM to zero), the input common voltage is approximately: RI V + V-IN VICM = +IN VOCM * + 2 RI + RF RF VINP + VCM * 2 RF + RI RF * RF + RI
Use the equations above to check that the VICM at the op amp inputs is within range (V- to V+).
RI V+IN RF V-OUT
+
VINP
- + +
VCM VVOCM VOCM
- -
VINM
-
+
RI
V-IN
RF
6406 F05
V+OUT
Figure 5. Circuit for Common Mode Range
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16
LTC6406 APPLICATIONS INFORMATION
Output Common Mode Voltage Range The output common mode voltage is defined as the average of the two outputs: VOUTCM = VOCM = V+OUT + V-OUT 2
LTC6406 14 -OUT 13 -OUTF V- 12 V- FILTERED OUTPUT 1.25pF -OUTF
50
+
1.25pF
The VOCM pin sets this average by an internal common mode feedback loop which internally forces VOUTCM = VOCM. The output common mode range extends from 0.5V above V- to 1V below V+. The VOCM voltage is internally set by a resistive divider between the supplies, developing a default voltage potential of 1.25V with a 3V supply. In single supply applications, where the LTC6406 is used to interface to an ADC, the optimal common mode input range to the ADC is often determined by the ADC's reference. If the ADC makes a reference available for setting the input common mode voltage, it can be directly tied to the VOCM pin (as long as it is able to drive the 18k Thevenin equivalent input impedance presented by the VOCM pin). The VOCM pin should be bypassed with a high quality ceramic bypass capacitor of at least 0.01F to filter any common mode noise rather than being converted to differential noise and to prevent common mode signals on this pin from being inadvertently converted to differential signals by impedance mismatches both externally and internally to the IC. Output Filter Considerations and Use Filtering at the output of the LTC6406 is often desired to provide antialiasing or to improve signal to noise ratio. To simplify this filtering, the LTC6406 in the QFN package includes an additional pair of differential outputs (+OUTF and -OUTF) which incorporate an internal lowpass RC network with a -3dB bandwidth of 850MHz (Figure 6). These pins each have an output resistance of 50 (tolerance 12%). Internal capacitances are 1.25pF (tolerance 15%) to V- on each filtered output, plus an additional
-
50
- 1.25pF V V-
9 7 +OUT 8 +OUTF
6406 F06
+OUTF
Figure 6. LTC6406 Internal Filter Topology
1.25pF (tolerance 15%) capacitor connected between the two filtered outputs. This resistor/capacitor combination creates filtered outputs that look like a series 50 resistor with a 3.75pF capacitor shunting each filtered output to AC ground, providing a -3dB bandwidth of 850MHz, and a noise bandwidth of 1335MHz. The filter cutoff frequency is easily modified with just a few external components. To increase the cutoff frequency, simply add two equal value resistors, one between +OUT and +OUTF and the other between -OUT and -OUTF (Figure 7). These resistors, in parallel with the internal 50 resistors, lower the overall resistance and therefore increase filter bandwidth. For example, to double the filter bandwidth, add two external 50 resistors to lower the series filter resistance to 25. The 3.75pF of capacitance remains unchanged, so filter bandwidth doubles. Keep in mind, the series resistance also serves to decouple the outputs from load capacitance. The outputs of the LTC6406 are designed to drive 5pF to ground, so care should be taken to not lower the effective impedance between +OUT and +OUTF or -OUT and -OUTF below 15. To decrease filter bandwidth, add two external capacitors, one from +OUTF to ground, and the other from -OUTF to ground. A single differential capacitor connected between +OUTF and -OUTF can also be used, but since it is being
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17
LTC6406 APPLICATIONS INFORMATION
driven differentially it will appear at each filtered output as a single-ended capacitance of twice the value. To halve the filter bandwidth, for example, two 3.9pF capacitors could be added (one from each filtered output to ground). Alternatively, one 1.8pF capacitor could be added between the filtered outputs, which also halves the filter bandwidth. Combinations of capacitors could be used as well; a three capacitor solution of 1.2pF from each filtered output to ground plus a 1.2pF capacitor between the filtered outputs would also halve the filter bandwidth (Figure 8).
49.9 -OUTF LTC6406 14 -OUT 13 -OUTF V- 12 V- FILTERED OUTPUT (1.7GHz)
1.25pF
50
+
1.25pF
-
50
- 1.25pF V V-
9 7 +OUT 49.9 8 +OUTF
6406 F07
+OUTF
Figure 7. LTC6406 Filter Topology Modified for 2x Filter Bandwidth (Two External Resistors)
-OUTF LTC6406 14 -OUT 13 -OUTF V- 12 50 V- 1.2pF FILTERED OUTPUT (425MHz) 1.2pF
1.25pF
+
1.25pF
-
50
- 1.25pF V V-
1.2pF 9
7
+OUT
8
+OUTF
6406 F08
+OUTF
Figure 8. LTC6406 Filter Topology Modified for 1/2x Filter Bandwidth (Three External Capacitors)
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18
LTC6406 APPLICATIONS INFORMATION
Noise Considerations The LTC6406's input referred voltage noise is 1.6nV/Hz. Its input referred current noise is 2.5pA /Hz. In addition to the noise generated by the amplifier, the surrounding feedback resistors also contribute noise. A noise model is shown in Figure 9. The output noise generated by both the amplifier and the feedback components is governed by the equation: RF 2 eni * 1+ R + 2 * (In * RF ) + I R 2 * enRI * F + 2 * enRF 2 RI
2 2
100 TOTAL (AMPLIFIER AND FEEDBACK NETWORK) OUTPUT NOISE 10 nV/Hz
FEEDBACK NETWORK NOISE ALONE 1
0.1 10 100 RI = RF () 1k 10k
6406 F10
eno =
Figure 10. LTC6406 Output Spot Noise vs Spot Noise Contributed by Feedback Network Alone
A plot of this equation, and a plot of the noise generated by the feedback components for the LTC6406 is shown in Figure 10.
enRI2 enRF2
The LTC6406's input referred voltage noise contributes the equivalent noise of a 155 resistor. When the feedback network is comprised of resistors whose values are less than this, the LTC6406's output noise is voltage noise dominant (see Figure 10): R eno eni * 1+ F RI Feedback networks consisting of resistors with values greater than about 200 will result in output noise which is resistor noise and amplifier current noise dominant.
RI in+2
RF
encm2
+
VOCM eno2
eno 2 *
-
in-2
(In * RF )2 + 1+ RF * 4 * k * T * RF R
I
eni2 enRI2 RI RF enRF2
6406 F09
Lower resistor values (<100) always result in lower noise at the penalty of increased distortion due to increased loading of the feedback network on the output. Higher resistor values (but still less than <500) will result in higher output noise, but typically improved distortion due to less loading on the output. The optimal feedback resistance for the LTC6406 runs in between 100 to 500. The differential filtered outputs +OUTF and -OUTF will have a little higher noise than the unfiltered outputs (due to the two 50 resistors which contribute 0.9nV/Hz each), but can provide superior signal-to-noise due to the output noise filtering.
Figure 9. Noise Model of the LTC6406
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19
LTC6406 APPLICATIONS INFORMATION
Layout Considerations Because the LTC6406 is a very high speed amplifier, it is sensitive to both stray capacitance and stray inductance. In the QFN package, three pairs of power supply pins are provided to keep the power supply inductance as low as possible to prevent any degradation of amplifier 2nd harmonic performance. It is critical that close attention be paid to supply bypassing. For single supply applications it is recommended that high quality 0.1F surface mount ceramic bypass capacitor be placed directly between each V+ and V- pin with direct short connections. The V- pins should be tied directly to a low impedance ground plane with minimal routing. For dual (split) power supplies, it is recommended that additional high quality, 0.1F ceramic capacitors are used to bypass V+ to ground and V- to ground, again with minimal routing. For driving large loads (<200), additional bypass capacitance may be needed for optimal performance. Keep in mind that small geometry (e.g. 0603) surface mount ceramic capacitors have a much higher self resonant frequency than do leaded capacitors, and perform best in high speed applications. Any stray parasitic capacitances to ground at the summing junctions, +IN and -IN, should be minimized. This becomes especially true when the feedback resistor network uses resistor values >500 in circuits with RF = RI. Excessive peaking in the frequency response can be mitigated by adding small amounts of feedback capacitance around RF. Always keep in mind the differential nature of the LTC6406, and that it is critical that the load impedances seen by both outputs (stray or intended), should be as balanced and symmetric as possible. This will help preserve the natural balance of the LTC6406, which minimizes the generation of even order harmonics, and improves the rejection of common mode signals and noise. It is highly recommended that the VOCM pin be bypassed to ground with a high quality ceramic capacitor whose value exceeds 0.01F This will help stabilize the common . mode feedback loop as well as prevent thermal noise from the internal voltage divider and other external sources of noise from being converted to differential noise due to divider mismatches in the feedback networks. It is also recommended that the resistive feedback networks be comprised of 1% resistors (or better) to enhance the output common mode rejection. This will also prevent VOCM input referred common mode noise of the common mode amplifier path (which cannot be filtered) from being converted to differential noise, degrading the differential noise performance. Feedback factor mismatch has a weak effect on distortion. Using 1% or better resistors will limit any mismatch from impacting amplifier linearity. However, in single supply level-shifting applications where there is a voltage difference between the input common mode voltage and the output common mode voltage, resistor mismatch can make the apparent voltage offset of the amplifier appear worse than specified. Interfacing the LTC6406 to A/D Converters Rail-to-rail input and fast settling time make the LTC6406 ideal for interfacing to low voltage, single supply, differential input ADCs. The sampling process of ADCs create a sampling glitch caused by switching in the sampling capacitor on the ADC front end which momentarily "shorts" the output of the amplifier as charge is transferred between the amplifier and the sampling capacitor. The amplifier must recover and settle from this load transient before this acquisition period ends for a valid representation of the input signal. In general, the LTC6406 will settle much more quickly from these periodic load impulses than from a 2V input step, but it is a good idea to either use the filtered outputs to drive the ADC (Figure 11 shows an example of this), or to place a discrete R-C filter network between the differential unfiltered outputs of the LTC6406 and the input of the ADC to help absorb the charge injection that comes out of the ADC from the sampling process. The capacitance of the filter network serves as a charge reservoir to provide high frequency charging during the sampling process, while the two resistors of the filter network are used to dampen and attenuate any charge kickback from the ADC. The selection of the R-C time constant is trial and error for a given ADC, but the following guidelines are recommended: Choosing too large of a resistor in the decoupling network leaving insufficient settling time will create a voltage divider between the dynamic input impedance of the ADC and the decoupling resistors. Choosing too small of a resistor will possibly prevent the resistor
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20
LTC6406 APPLICATIONS INFORMATION
from properly dampening the load transient caused by the sampling process, prolonging the time required for settling. In 16-bit applications, this will typically require
1.8pF VIN, 2VP-P
a minimum of 11 R-C time constants. It is recommended that the capacitor chosen have a high quality dielectric (such as C0G multilayer ceramic).
150 15
150 14 13
16
NC SHDN
+IN
-OUT
-OUTF 1.25pF
LTC6406 V- 12 V- V + 11 0.1F 3.3V 0.1F -INA VCM 2.2F D15 * * D0 VDD 1F 9 3.3V 1F CONTROL
SHDN 1 V+ 3.3V 0.1F 3 2 V- V VOCM 4 0.1F 5 VTIP 0.1F 150 150 6 -IN 7 +OUT 8
-
100k V+
50
+
VOCM 1.25pF V+ 50 1.25pF
+INA LTC2208 GND
-
V+ 10 V- V -
+OUTF
6406 F11
1.8pF
Figure 11. Interfacing the LTC6406 to an ADC
TYPICAL APPLICATION
DC-Coupled Level Shifting of Demodulator Output
5V LT5575 5V 5pF I 65 5V 5pF 65 0dBm DIFF OUTPUT Z 130 2.5pF DC LEVEL 3.9V R1 75 R2 75 5V 5pF Q 65 5V 5pF 65 C1 10pF C2 10pF VOCM 1.25V R6 475 IDENTICAL Q CHANNEL C4 1.8pF R3 75 C3 R4 12pF 75 DC LEVEL 3.3V C5 1.8pF DC LEVEL 1.25V 3.3V R9 10 10dBm C6 R10 22pF 10 C7 22pF LTC2249 14-BIT ADC
R5 475 3.3V
C8 22pF R7 49.9 R8 49.9
+-
LTC6406
RF IN 900MHz -3dBm
-+
6406 TA02
80MHz SAMPLE CLOCK
GAIN: 3dB INPUT NF: 13dB OIP3: 31dBm
GAIN: 10dB INPUT NF: 18dB OIP3: 44dBm
SEE DN418 FOR MORE INFORMATION
6406fb
21
LTC6406 PACKAGE DESCRIPTION
UD Package 16-Lead Plastic QFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 0.05
3.50 0.05 1.45 0.05 2.10 0.05 (4 SIDES)
PACKAGE OUTLINE 0.25 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.75 0.05 BOTTOM VIEW--EXPOSED PAD R = 0.115 TYP 15 16 0.40 0.10 1 1.45 0.10 (4-SIDES) 2 PIN 1 NOTCH R = 0.20 TYP OR 0.25 x 45 CHAMFER
3.00 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6)
(UD16) QFN 0904
0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.25 0.05 0.50 BSC
6406fb
22
LTC6406 PACKAGE DESCRIPTION
MS8E Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1662)
BOTTOM VIEW OF EXPOSED PAD OPTION 1 2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004)
2.794 0.102 (.110 .004)
0.889 0.127 (.035 .005)
5.23 (.206) MIN
2.083 0.102 3.20 - 3.45 (.082 .004) (.126 - .136) 8 3.00 0.102 (.118 .004) (NOTE 3)
0.42 0.038 (.0165 .0015) TYP
0.65 (.0256) BSC
8
7 65
0.52 (.0205) REF
RECOMMENDED SOLDER PAD LAYOUT
DETAIL "A" 0 - 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4)
0.254 (.010) GAUGE PLANE
1 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 1.10 (.043) MAX
23
4 0.86 (.034) REF
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.65 (.0256) BSC
0.1016 0.0508 (.004 .002)
MSOP (MS8E) 0307 REV D
6406fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC6406 TYPICAL APPLICATIONS
Attenuating and Level Shifting a Single-Ended 5V Signal to a Differential 2VP-P Signal at a 1.25V Common Mode
C1, 2.7pF 2VP-P DIFF OUTPUT LEVEL-SHIFTED TO 1.25V 3.3V R5 511 5V SINE WAVE (10VP-P) CENTERED AT 0V R6 511 3.3V R1 51.1 R2 51.1 LTC2207
R3, 100
-+
LTC6406
VIN
+-
R4, 100 C2, 2.7pF
6406 TA03
VCM = 1.25V
Second Order 30MHz 0.5dB Chebyshev Differential Input/Output Lowpass Filter
R1, 150 C1, 8.2pF R7 51.1 R3 150 R2 232 C3 68pF R4 232 C4 68pF R6 150 C7 4.7pF C6 4.7pF C5 4.7pF C2 8.2pF 105MHz CLOCK R9 4.99 R10 4.99 LTC2207 3.3V
+-
LTC6406
R8 51.1
+ -
DIFFERENTIAL VIN R5 150
-+
VCM
6406 TA04
RELATED PARTS
PART NUMBER LT1809/LT1810 LT1993-2/LT1993-4/ LT1993-10 LT1994 LTC6400-20 LTC6401-20 LT6402-6/LT6402-12/ LT6402-20 LTC6404-1 DESCRIPTION Single/Dual 180MHz, 350V/s Rail-to-Rail Input and Output Low Distortion Op Amps 800MHz/900MHz/700MHz Low Distortion, Low Noise Differential Amplifier/ADC Driver Low Noise, Low Distortion Fully differential Input/Output Amplifier/Driver 1.8GHz Low Noise, Low Distortion, Differential ADC Driver 1.3GHz Low Noise, Low Distortion, Differential ADC Driver 300MHz/300MHz/300MHz Low Distortion, Low Noise Differential Amplifier/ADC Driver 600MHz Low Noise, Low Distortion, Differential ADC Driver COMMENTS 180MHz, 350V/s Slew Rate, Shutdown AV = 2V/V / AV = 4V/V / AV = 10V/V, NF = 12.3dB/14.5dB/12.7dB, OIP3 = 38dBm/40dBm/40dBm at 70MHz Low Distortion, 2VP-P, 1MHz: -94dBc, 13mA, Low Noise: 3nV/Hz 300MHz IF Amplifier, AV = 20dB 140MHz IF Amplifier, AV = 20dB AV = 6dB/AV = 12dB/AV = 20dB, NF = 18.6dB/15dB/12.4dB, OIP3 = 49dBm/43dBm/51dBm at 20MHz 1.5nV/Hz Noise, -90dBc Distortion at 10MHz 2.5MHz/5MHz/10MHz/20MHz Integrated Filter, 3V Supply, SO-8 Package
6406fb LT 0208 REV B * PRINTED IN USA
LT6600-2.5/LT6600-5/ Very Low Noise, Fully Differential Amplifier and 4th LT6600-10/LT6600-20 Order Filter
24 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007


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